EDN

X-FAB Rolls Out Trench-Isolated SOI CMOS Process

To reduce die size by up to 40 percent, Erfurt, Germany-based analog/mixed-signal foundry X-FAB Semiconductor Foundries AG Tuesday announced XT06, its 0.6-micrometer silicon-on-insulator (SOI) CMOS ...
EDN

X-Fab launches high-temperature CMOS process

LONDON — Analog/mixed signal foundry X-Fab (Erfurt, Germany) offers a production process for chips that need to operate at high temperatures beyond the normal military operating limit. The XA035 mixed ...
Semiconductor Engineering

Impact of CMOS Image Sensors Fabrication Processes On The Quality Of Smartphone Pictures

A technical paper titled “A Review of the Recent Developments in the Fabrication Processes of CMOS Image Sensors for Smartphones” was published by researchers at Texas A&M University. “CMOS Image ...
ExtremeTech

IBM builds graphene chip that's 10,000 times faster, using standard CMOS processes

Engineers at IBM Research are claiming to have built the world's most advanced graphene-based computer chip, with performance that's 10,000 times better than previous graphene ICs. The key to the ...
Business Wire

SFN Launches ‘Infrastructure Time Machine’ That Enables Fabs to Reduce Semiconductor Production Times 10 Fold and Increase Net Profit 40-50 Times

NOTTINGHAM, England--(BUSINESS WIRE)--Maximize Chip Act ROI with new transistor technology A new semiconductor technology could be applied at older-generation Fabs, which would enable them to produce ...
TechNewsWorld

Luxtera Delivers CMOS Photonics Technology

Fabless semiconductor company Luxtera announced today that it has solved the longstanding problem of building advanced photonic interfaces into mass-produced silicon chips. The company claimed that, ...
Semiconductor Engineering

Process Variation Analysis Of Device Performance Using Virtual Fabrication — Methodology Demonstrated On A CMOS 14-nm FinFET Vehicle

A new methodology to assess the impact of fabrication inherent process variability on 14-nm fin field effect transistor (FinFET) device performance. August 18th, 2021 - By: Coventor A new methodology ...
Electronic Design

Creating On-Chip MEMS Sensors in CMOS

Nanusens' novel approach to creating nanoscale sensor structures inside the CMOS layers. How the methodology helps shrink cost and size. Previously, MEMS sensors were created by employing proprietary ...